DK Digital AVR-500 Datenblatt Seite 58
- Seite / 58
- Inhaltsverzeichnis
- LESEZEICHEN
- HogthrobV0 Users Manual 1
- HogthrobV0 2
- Revision History 3
- 0.1 Apr. 2006 Initial version 3
- 0.2 Oct. 2006 Pin definitions 3
- 0.3 Sep. 2007 Restructured 3
- Contents 4
- Chapter 1 6
- 1.1 Further Information 7
- HogthrobV0 Overview 8
- (b) Layout 10
- 2.1.2 Programming 11
- 2.1.3 UART 11
- 2.2 Pin Connections 12
- 2.2.3 Bus Switches 13
- 2.2.4 FPGA IO 14
- Xilinx FPGA 15
- 3.2 Software installation 16
- 3.3 Building a Project 18
- Chapter 4 19
- 4.1.3 Radio Control 20
- 4.2 FPGA Interface 21
- 4.3 Radio Interface 23
- 4.3.2 SPI Master Mode and PB0 24
- 4.3.3 ShockBurst Mode 24
- 4.4 TinyOS 25
- 4.4.3 nRFSPI 26
- (a) Data packet structure 27
- Chapter 5 28
- 5.1.1 Fuse programming 29
- 5.1.2 Program upload 29
- 5.1.3 ATMega UART1 29
- 5.1.4 ATMega LED 29
- 5.2 FPGA Testing 30
- 5.2.3 FPGA→LED, Push-Button 31
- (Serial Interface) 31
- 5.2.5 AVR→FPGA 32
- 5.2.6 FPGA→FLASH 32
- Schematics 33
- 34
- 35
- 36
- 37
- 38
- 39
- $ 40
- % 41
- & 42
- IO Technologies A/S 43
- Appendix B 44
- B.2 Bill of Components 45
- B.3 Schematics 45
- FPGA control.c 46
- Appendix D 51
- FPGA Makefile 55
- Bibliography 58
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