DK Digital AVR-500 Datenblatt PDF herunterladen (Seite 13)

Line Radio Board AVR FPGA

RXD1 J1, pin 31 PD2 (RXD1/INT2) FPGA IO17

TXD1 J1, pin 32 PD3 (TXD1/INT3) FPGA IO18

CLK (SCK) CLK1 PB1 (CLK) FPGA IO13

MOSI+MISO DATA PB2+PB3 FPGA IO14+FPGA IO15

INT0 DR2 PE4 (INT4) FPGA IO1

Radio IO0 DR1

PE5 (INT5) FPGA IO4

+ (by mistake) PB0 (

ˆ

SS)

Radio IO1 DOUT2 PB5 FPGA IO2

Radio IO2 CS PB6 FPGA IO3

Radio IO3 PWR UP PB7 FPGA IO5

J1, pin 13 FPGA IO6

Radio IO4 J1, pin 15 PD4 FPGA IO7

Radio IO5 DEVICE CODE0 PD5 FPGA IO8

Radio IO6 DEVICE CODE1 PG3 FPGA IO9

Radio IO7 LED0 PG4 FPGA IO10

Radio IO8 LED1 PC3 FPGA IO11

Radio IO9 CLK2 PC2 FPGA IO12

Radio IO10 CE PC1 FPGA IO0

Radio IO11 NC7SZ125 PC0 FPGA IO16

2.2.3 Bus Switches

RADIO MUXS2 RADIO MUXS1 RADIO MUXS0

PI3B16213 S2 S1 S0

RADIO MUXx 2 1 0

AVR - pin PC6 PC5 PC4

12

1 2 ... 8 9 10 11 12 13 14 15 16 17 18 ... 57 58

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